Dr. Willy Rachmady, Intel Corp.
Surface Preparation and Passivation of III-V Substrates for Ultra-High Speed, Low Power Logic Applications

Willy Rachmady is a staff research engineer in the Component Research, Technology and Manufacturing Group, Intel Corporation. Rachmady is responsible for the development of advanced front-end clean and surface preparation processes and modules for Intel's future transistor and process technologies. Since joining Intel in 2001, he has contributed to the development and implementation of novel clean and patterning processes for several generations of Intel's silicon process technologies, including the company's industry-leading high-K/metal-gate. He is also involved in the research of emerging non-silicon nanoelectronic devices.
Rachmady received his bachelor's degree from Lafayette College and Ph.D. in chemical engineering from The Pennsylvania State University. He has published 8 papers and has been awarded 2 patents with another 29 patents pending.

Dr. Brian Kirkpatrick, Texas Instruments
Material Loss Impact on Device Performance for 32nm CMOS and Beyond

Brian K. Kirkpatrick is a Senior Member Technical Staff at Texas Instruments, where he is responsible for development of the company’s 45nm and 32nm technology in the Isolation and Gate Loops.  After earning a master’s degree in materials science and engineering from Washington State University in December 1985, Brian worked in process engineering for RCA/Sharp Microelectronics as well as Philips Semiconductors. Brian joined TI’s 0.5um logic productization group in 1991.  As a team leader, Brian led development of some of TI’s most advanced technology, including the company’s 90nm isolation technology.  Brian holds numerous U.S. and foreign patents, co-authored the chapter on surface preparation in the 2007 Handbook of Semiconductor Manufacturing Technology, is a member of ECS, and is active on the ITRS Committee.

Dr. Ayako Shimazaki, Toshiba Corp.
Metallic contamination control in leading-edge ULSI Manufacturing

Ayako Shimazaki was born in Tokyo, Japan, in 1960.  She received the B.S. degree in chemistry from Sophia University, Tokyo, Japan, in 1982, and the Ph.D. degree in electronic engineering from Tohoku University, Sendai, Japan, in 2007.  She was with the Toshiba Research and Development Center, Kawasaki, Japan, in 1982, where she was engaged in the research and development of ultra-trace chemical analysis for semiconductor materials, especially silicon wafer surface contamination.  Since 1988, she has been engaged in the research of ultra clean technology for process and manufacturing engineering in semiconductor division.  Dr. Shimazaki has served on the technical program committee on International Symposium on Semiconductor Manufacturing.  She is a member of the Institute of Electronics, Information and Communication Engineers.

Prof. Dennis Hess, Georgia Tech, Atlanta
Photoresist Removal Using Alternative Chemistries and Pressures

Dennis W. Hess is the Thomas C. DeLoach Jr., Professor of Chemical and Biomolecular Engineering at the Georgia Institute of Technology.  He received a B.S. in Chemistry from Albright College, and M.S. and Ph.D. degrees in Physical Chemistry from Lehigh University.  He is a Fellow of the American Association for the Advancement of Science, the American Institute of Chemical Engineers (AIChE), and the Electrochemical Society (ECS).  He has served as Editor-in-Chief for Electrochemical and Solid State Letters since 2004, and as Associate Editor for Chemistry of Materials from 1988-1996.  He was President of the Electrochemical Society for the 1996-1997 term.  He received the Charles M. A. Stine Award from the MESD Division of AIChE (1999), the Thomas D. Callinan Award from the DS&T Division of ECS (1993), and the Solid State Science and Technology Award from ECS (2005).

Dr. Lucille Broussous, STMicroelectronics
Porous low-k wet etch in HF-based solutions: focus on cleaning process window, "pore-sealing" and "k recovery"

Dr. Lucile Broussous received a MS in materials sciences (polymers, interfaces and amorphous states) in 1996, and a PhD in Physico-chemistry of Materials in 1999 from the University of montpellier, France.
She did post-doctoral research at the Chemistry Institute of Araraquara/Sao Paulo, Brasil, were she focused on nanoparticles synthesis and dispersion in liquid phase.

Lucile Broussous joined ST Microelectronics in 2001 and is currently R&D engineer for BEOL Post-etch Cleanings for R&D IC generations including copper, low-k and ultralow-k dielectric materials, as well as emerging technologies such as imagers. Moreover, she is in charge of advanced R&D projects with universities through the supervision of  PhDs (Galvanic corrosion Issues in interconnection levels, Rinsing and drying optimisation thanks to fluids dynamics simulations, and PhD defended in 2007 on Porous low-k modifications during etch and clean processes).
During these 7 years in STMicroelectronics, Dr. Lucile Broussous adquired a great experience on BEOL Cleaning issues, materials and chemistries compatibility, specific characterisations of thin porous layers, with an open vision on "Cleaning Tool-set" evolution (emergence of Single Wafer Tools).